Principal Software Engineer

Principal engineer and DSP lead for embedded software on radar programs. Set architecture and direction; drove requirements and verification across hardware, firmware, integration, and test.

• Mar 2026 – PresentLeadership

  Set embedded software direction across radar programs

  Arbitrated design decisions between hardware, firmware, integration, and test organizations. Unblocked cross-team conflicts before they reached the program schedule.

  • Embedded C
  • DSP
  • Radar systems
  • Requirements engineering

Software architect and task lead for a new radar receiver. Defined interface contracts across hardware, firmware, and systems; grew the team from 8 to 18 engineers.

• 8 to 18Engineers on the team

  Feb 2025 – PresentArchitecture

  Owned the software architecture for a new radar receiver

  Defined interface contracts that hardware, firmware, and systems teams could integrate against independently. Grew the team from 8 to 18 engineers.

  • Software architecture
  • Hardware integration
  • Firmware interfaces
  • Systems engineering

  Project Radar receiver replacementAlso under Principal Software Engineer

Software task manager for several radar signal-processing capabilities, absorbing responsibilities as senior engineers retired or left. Found the race condition that blocked the radar's government acceptance, and delivered an end-of-life DSP replacement solo, 6 months early and 48% under budget, cutting boot failures from 7–10% to 2–3% along the way.

• 5 to 1DSPs a customer must swap at once

  Jun 2024DSP

  Made radar DSPs plug-and-play so customers can replace them one at a time

  Customers can replace obsolete DSPs one at a time, as boards fail or budget allows, instead of buying and swapping all 5 at once. Operators no longer need to know or enter the hardware configuration at boot. The extra work fit inside the effort's 48%-under-budget delivery.

  • DSP
  • Hardware integration
  • Boot and initialization
  • Auto-configuration
  • Systems design

  Project End-of-life DSP replacement

• 7–10% to 2–3%Boot failure rate

  Sep 2023Embedded

  Cut boot failure rate from 7–10% to 2–3% on radar platform

  Boot failure rate dropped from ~7–10% to ~2–3%. The failure was a major pain point for the customer, who had filed 93 formal issues against it across two software releases, all rated major. That was about a quarter of the 354 customer issues filed across all of the team's software releases, and this one fix closed all 93. Each boot takes about 10 minutes, and test events run about five a day with 20–30 engineers on site, so every failed boot left the whole team waiting. The fix still ships in every fielded unit worldwide. Remaining failures are due to the supplier's released hardware limitations.

  • Embedded C
  • Boot and initialization
  • Failure analysis
  • Hardware integration

  Project End-of-life DSP replacement

• 6 months earlyDelivered 48% under budget

  May 2023 – Sep 2024DSP

  Delivered an end-of-life DSP replacement 6 months early and 48% under budget

  Finished 6 months ahead of schedule and 48% under budget across the full software and test effort. Replaced the supplier's DMA boot protocol with a POSIX-compliant Ethernet/UDP boot, which cut reliance on supplier software and made boot about 10% faster and far more consistent. This work also produced the boot-failure fix (7–10% → 2–3%) and plug-and-play DSPs that customers can replace one at a time.

  • DSP
  • Hardware integration
  • Boot and initialization
  • Ethernet/UDP
  • POSIX
  • Supplier coordination

  Project End-of-life DSP replacement

• OvernightFix after an 8-month, 5-engineer investigation

  Nov 2022Embedded

  Resolved the race condition blocking the radar's government acceptance

  Implemented the root-cause fix overnight and passed customer-site testing the following morning. The fix closed 19 formal customer issues, all rated major, out of 354 filed across all of the team's software releases. Preserved the only software baseline compatible with an obsolescence-driven hardware replacement required for continued radar production.

  • Embedded C
  • Real-time systems
  • Concurrency debugging
  • Failure analysis
  • Hardware integration

Embedded C on DSP hardware for real-time radar signal processing. Built the radar's interface to a simulated missile, tuned real-time paths, and became software task manager for several radar signal-processing capabilities.

• $2M+ to 1 PCHardware needed to simulate a missile

  Feb 2020 – Aug 2020Embedded

  Replaced $2M+ of missile-simulation hardware with software on a Linux PC

  Simulating a missile used to take more than $2 million of dedicated hardware (2020 cost). The new simulator needs only a Linux computer and an Ethernet connection. With no specialized hardware left to go end-of-life, the simulation is also protected from future obsolescence. Proof of concept and the first successful end-to-end runs came in August 2020, six months after the project started.

  • RTOS
  • Embedded C
  • Interface development
  • Simulation
  • Cross-team debugging
  • System integration
  • Requirements

  Project Simulated missile interface

• Oct 2019 – Feb 2025DSP

  Cut radar correlator cycle counts with identical output

  Cut cycle counts on the radar correlator while keeping the algorithmic output identical.

  • C
  • DSP
  • Embedded systems
  • Performance profiling

  Also under Software Engineer II

Non-destructive testing (NDT) division. Debugged hardware issues at the PCB level, built bills of materials for new products, and automated software tests that traced connectivity performance problems back to the software.

Project management support at an electrical construction contractor.

• Jan 2018 – Apr 2018Automation

  Automated customer estimates, earning a Cooperative Education Award

  Management wrote to the president of Wentworth praising the work, which earned the school's Cooperative Education Award (2018).

  • Excel

R&D on the school's student-built photolithography system. Took over its dose-control software and measurement circuits, and regularly presented new designs and data to faculty mentors.

• 15% to 2%Dose error

  May 2017 – Dec 2018Systems

  Cut photolithography dose error from 15% to 2%

  Dose error fell from about 15% to 2%. Presented as posters at AAAS and NCUR 2018.

  • Microcontrollers
  • Circuit design
  • MATLAB
  • Oscilloscopes
  • Photodiode calibration

Minors in Applied Mathematics and Computer Science.